IPR Attorney / Semiconductor Layout-Designs
60 — Semiconductor Layout-Designs · Filed. Registered. Defended.
A semiconductor integrated circuit layout-design — the arrangement of transistors, circuitry elements and connecting lead wires on a chip — can be registered as its own sui generis IP right, separate from patent or copyright. Registration is handled by the Semiconductor Integrated Circuits Layout-Design Registry (SICLDR) under the SICLD Act, 2000.
FIG. 7 — Mask layout & lead wires
What Qualifies
A layout-design must be the creator's own intellectual effort, must be distinctive and capable of distinguishing itself from other layout-designs, and must not have been commercially exploited anywhere in India or in a convention country before the filing date.
Only the layout-design itself is protected under the Act — a printed circuit board (PCB) is not a semiconductor integrated circuit and cannot be registered under this framework.
How a Layout-Design Proceeds
Form LD-1 is filed with three sets of drawings or photographs describing the mask layout.
The Registrar accepts, refuses, or accepts the application with modifications.
An accepted application is advertised within 14 days of acceptance.
Any opposition may be filed within 3 months of advertisement, with a counter-statement due within 2 months of that.
If unopposed, or once opposition is resolved, a Registration Certificate is issued for a 10-year term.
Frequently Asked
Send the mask layout drawings and the date of any commercial exploitation — timing is critical for this registration.